A conventional procedure for manufacture of semiconductor chips in commercial quantities is to fabricate or process a great number, hundreds or thousands, of identical chips simultaneously on a large size wafer of substrate material. Each semiconductor chip defines or contains a copy of the circuit of a power amplifier, low noise amplifier, computer processor, an electronic component or electronics components of greater complexity. That circuit fabrication on the wafer typically uses conventional doping, photoresist and etching processes, the details of which are well known and not relevant to the present invention. Once circuit fabrication is completed, the wafer is cut apart, parsed, into individual chips for individual handling, testing, lead attachment and/or packaging and generally finished into a device suitable for insertion into electronics equipment.
Separation of the individual chips from the unitary structure formed with the wafer is accomplished by sawing. As part of the circuit processing and in preparation for the subsequent sawing of the chips, described above, a grid of parallel lines is marked or drawn in a cross-hatch pattern on the side of the wafer containing the formed circuits. Those lines, referred to as saw lines, serve as the boundaries to the large number of regions of the real estate of the wafer each of which contains an individual chip or, as sometimes referred to, die, and guides alignment of the wafer in the saw apparatus and in sawing. The underside of the processed wafer is placed in contact with the sticky side of a length of adhesive tape, which serves as a carrier for the wafer. Held in that carrier by the adhesive, the wafer is sawed through with a circular saw blade along the saw lines to cut out the chips or die, while leaving the adhesive tape undisturbed. Following the sawing operation, the semiconductor die may be individually detached from the adhesive tape and thereafter may be finished into a packaged chip ready for use.
The friction produced by sawing the wafer produces heat. To prevent the saw blade and the wafer from overheating the sawing apparatus directs a stream of deionized water onto the cutting edge of the blade to cool the blade during cutting. That stream also strikes the wafer as well. The rotating blade of the saw also produces vibrations. The adhesive tape prevents the die that are cut from the wafer from being blasted away by the force of the coolant water stream during the sawing procedure or bounced off the wafer support by the vibration, both of which are undesirable.
As one appreciates, the rate of coolant flow employed is functionally dependent on the amount of heat produced in sawing the wafer and that coolant rate in turn greatly depends on the hardness characteristic of the wafer substrate material. Substrate materials commonly used in the past in volume production employed wafers of Gallium Arsenide (GaAs), which has a hardness of 4 to 5 on the Moh's scale, Silicon (Si) which has a hardness of 7 on the Moh's scale, and, less commonly used, Silicon carbide (SiC), which has a hardness of 9.5 and Sapphire, which has a hardness of 9 on that scale. Relatively speaking, the GaAs, Silicon and Silicon Carbide are of a hardness that is relatively low, while the Sapphire and Silicon Carbide possess a high hardness. Consequently, a greater amount of heat is produced when sawing a sapphire wafer and the coolant flow, and, hence, the force exerted by the flow, must be greater than when sawing the other wafer materials.
However, in those previous applications, the area of the die (length by width) in contact with the adhesive surface of the tape is relatively large. The height of the die is low relative to the length and width of the die, which gave the die a relatively low aspect ratio, the ratio of the die height to the length or width. As example, a typical GaAs integrated circuit has an aspect ratio of 0.03. Since the greater the contact area, the greater the adhesion, the adhesive tape exerted a retaining force on the respective die that was greater the shear force exerted thereon by the coolant stream and also greater than the mechanical moment produced by the application of the coolant stream to the upper end of the respective die.
Moreover, the adhesive bond of the tape carrier to the die is intended to be releasable, not permanent. Even though the adhesive bond of the tape is sufficient to retain the die on the support during the sawing procedure, after the procedure is completed, the die could be individually plucked from the tape for further handling. Plucking is accomplished manually by gripping the die with a tweezer or the like and pulling the die upward off the tape, overcoming the adhesive bond, whereupon the tape released the die.
That convenient and widely employed sawing procedure appears to have reached a limit with the advance in transistor technology. Transistors formed of Gallium Nitride (“GaN”) constructed on substrates of sapphire or silicon carbide have proven useful as high electron mobility transistors (“HEMT”), power amplifiers and low noise amplifiers. To be economically feasible, it is necessary to fabricate those transistors in commercial volumes, much in the same way as is accomplished in the production of the prior GaAs transistors, namely the production of large numbers of transistors on a wafer that is commercially available in a standard size. Quite routinely, the described sawing procedure was applied to the manufacture of the Gallium Nitride transistor, but with devastating effect.
Of the two appropriate substrate materials for the GaN, Silicon carbide is prohibitively expensive, leaving sapphire as the substrate of economic choice for the GaN transistors. It was found that the surface area required of an individual transistor die was quite small, about 300 microns in length by 150 microns in width, enabling the designer to pack a large number of those die into the area described by the sapphire wafer. In contrast, the substrate to be diced had a depth of 300 to 600 microns, effectively exhibiting a high aspect ratio for the individual die. Because sapphire is a very hard material, sawing the wafer was anticipated to generate more heat than usual and, accordingly, the coolant flow of the saw was appropriately increased to avoid thermal damage to both the saw blade and the wafer.
That coolant flow produced two profound adverse effects. First, localized heating from the interaction of the saw blade with the hard material led to a breakdown in the adhesive properties of the adhesive tape. Secondly, the increased coolant flow produced sufficient force to detach and blow the individual die formed by the sawing from the tape, scattering the die about. When sawing produced a number of the cross-hatched saw lines defining a portion of the die, one was surprised to find that the force of the coolant stream blasted the semiconductor die off the cutting table, much like a garden hose would blast a pile of ping-pong balls all over the room. The scattered die were thus considered contaminated and could not be used. Continuing sawing out additional die produced the same result. The yield of useable die from the wafer was essentially zero. The tried and true prior art sawing process failed. Applicants confronted a situation of first impression then without known remedy.
Lessening the coolant flow rate was not a practical alternative, since frequent replacement of the saw blades alone was too expensive. Increasing the strength of the adhesive was also not a solution. The adhesive strength would have to be increased so greatly as would make it difficult or impossible to pluck die from the tape on completion of sawing. Increasing the surface area of the semiconductor die, as example quadrupling the surface area and, thereby, reducing the aspect ratio of the die, would produce greater adhesive strength of an individual die to the tape. However, the number of die that could be fabricated on a given wafer would be reduced by three-quarters, prohibitively increasing the cost of a chip and rendering the chip economically unfeasible. Until the present invention no way was known to accomplish economical dicing of high aspect ratio semiconductor chips from a sapphire wafer.
Accordingly, an object of the present invention is to provide an effective and economically viable process for sawing semiconductor chips formed on very hard substrates.
A further object of the invention is to provide adhesion between high aspect ratio die that are cut from a wafer of hard material and a supporting carrier that is strong enough to resist the impact of coolant required during sawing of the die and eliminate that adhesion when it is desired to remove the die from the carrier.
An additional object of the invention is to provide a novel process for sawing GaN chips that are formed in a sapphire wafer.
And, a still additional object of the invention is to provide a carrier arrangement for use in the process of sawing semiconductor chips from a wafer that does not employ adhesive tape.